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Journal Article

Citation

Wright RI. Reliab. Eng. 1987; 19(4): 245-254.

Copyright

(Copyright © 1987, Elsevier Publishing)

DOI

10.1016/0143-8174(87)90056-4

PMID

unavailable

Abstract

In applying conventional Fault Tree Analysis to a complex power distribution network, a number of practical problems were encountered. In particular, the use of a thorough, node-by-node top down analysis procedure inevitably led to logical loops arising from the highly interconnected nature of the system. These loops were not always obvious since they could involve very complex paths through the network. The presence of loops makes analysis of the system impossible.

A second difficulty was that the logical description which resulted from Fault Tree Analysis implied the use of routes through the network which would not be usable in practice, either from power loading considerations or from the practical difficulty of implementing the route.

In order to overcome these problems, a technique was devised using Boolean logic success equations to define the permissible power flow routes between nodes in the network. Using simple rules, logical loops are avoided and practical network re-configuration policies can be incorporated. A computer program was used to generate and evaluate the system minimal cutsets from these logic equations.

It is believed that the technique is a general tool which will find application in other fields such as the analysis of telecommunications networks.

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